Upon assembling a product using the TCP implementation, a technology called TAB (Tape Automated Bonding) is used. On a main surface of a semiconductor chip, a bump electrode is formed as an external terminal, and the semiconductor chip is bonded to a film carrier with Inner-Lead Bonding (ILB). The film carrier has a long tape-like shape, on which repetitive wiring patterns are formed. The film carrier has device holes, each of which exposes an inner lead, and outer leads, and is automatically conveyed for each device hole. The semiconductor chip is aligned with a given position of the device hole, and the bump electrode thereof is bonded to the inner lead on the film carrier using a technology such as a thermal compression bonding process. Subsequently, the outer leads are bonded to key points on the semiconductor chip.
FIGS. 1A and 1B are a plan view and a cross-sectional view, respectively, of a conventional semiconductor device, showing a structure around a bump electrode thereof. A semiconductor device 12 includes a semiconductor chip 11 and an electrode pad 22. The semiconductor chip 11 further includes a plurality of wiring layers (not shown diagrammatically) that are insulated from each other with inter-layer insulating films. The electrode pad 22 is provided as a part of the wirings at the uppermost layer. A passivation film 24, having an opening, which is smaller in size than the bump electrode 14, which is to be explained hereinafter, is provided on the electrode pad 22. An under-bump metal 23 is formed on the passivation film 24, and connected to the electrode pad 22 through the opening thereof. The bump electrode 14 is connected to the electrode pad 22 via the under-bump metal 23. An inner lead 18 of a film carrier is connected to the bump electrode 14 by a thermal compression bonding process.
To keep the passivation film 24 flat, the electrode pad 22 is kept larger in dimension than the bump electrode 14. Therefore, the bump electrode 14 completely overlaps with the electrode pad 22.
Japanese Patent Number 2919488 discloses a technology related to the present invention.
Recently, as the miniaturization of the semiconductor chip has progressed, the electrode pad has come to occupy a large portion of the chip footprint, leading to reduced competitiveness in cost. However, it has been difficult to reduce the size of the bump electrode itself while ensuring a sufficient area for contact thereof with the inner lead.
In the conventional semiconductor device as shown in FIG. 1, the electrode pad 22 had to be larger in size than the bump electrode 14 to ensure the flatness of the passivation film 24. Thus, it has not been possible to utilize the area under the bump electrode 14, and, in turn, to reduce the size the semiconductor device itself.